Freescale Semiconductor /MKV58F24 /DMAMUX /CHCFG16

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Interpret as CHCFG16

SOURCE=0, TRIG=0, ENBL=0

Description

Channel Configuration register

Fields

SOURCE	DMA Channel Source (Slot) 0 (0): Disable_Signal 2 (2): UART0_Rx_Signal 3 (3): UART0_Tx_Signal 4 (4): UART1_Rx_Signal 5 (5): UART1_Tx_Signal 6 (6): PWM0_WR0_Signal 7 (7): PWM0_WR1_Signal 8 (8): PWM0_WR2_Signal 9 (9): PWM0_WR3_Signal 10 (10): PWM0_CP0_Signal 11 (11): PWM0_CP1_Signal 12 (12): PWM0_CP2_Signal 13 (13): PWM0_CP3_Signal 14 (14): CAN0_Signal 15 (15): CAN1_Signal 16 (16): SPI0_Rx_Signal 17 (17): SPI0_Tx_Signal 18 (18): XBARA_OUT_0_Signal 19 (19): XBARA_OUT_1_Signal 20 (20): XBARA_OUT_2_Signal 21 (21): XBARA_OUT_3_Signal 22 (22): I2C0_Signal 24 (24): FTM0_Channel0_Signal 25 (25): FTM0_Channel1_Signal 26 (26): FTM0_Channel2_Signal 27 (27): FTM0_Channel3_Signal 28 (28): FTM0_Channel4_Signal 29 (29): FTM0_Channel5_Signal 30 (30): FTM0_Channel6_Signal 31 (31): FTM0_Channel7_Signal 32 (32): FTM1_Channel0_Signal 33 (33): FTM1_Channel1_Signal 34 (34): CMP3_Signal 36 (36): FTM3_Channel0_Signal 37 (37): FTM3_Channel1_Signal 38 (38): FTM3_Channel2_Signal 39 (39): FTM3_Channel3_Signal 40 (40): HSADC0A_Signal 41 (41): HSADC0B_Signal 42 (42): CMP0_Signal 43 (43): CMP1_Signal 44 (44): CMP2_Signal 45 (45): DAC0_Signal 47 (47): PDB1_Signal 48 (48): PDB0_Signal 49 (49): PortA_Signal 50 (50): PortB_Signal 51 (51): PortC_Signal 52 (52): PortD_Signal 53 (53): PortE_Signal 54 (54): FTM3_Channel4_Signal 55 (55): FTM3_Channel5_Signal 56 (56): FTM3_Channel6_Signal 57 (57): FTM3_Channel7_Signal 60 (60): AlwaysOn60_Signal 61 (61): AlwaysOn61_Signal 62 (62): AlwaysOn62_Signal 63 (63): AlwaysOn63_Signal
TRIG	DMA Channel Trigger Enable 0 (0): Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode) 1 (1): Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode.
ENBL	DMA Channel Enable 0 (0): DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel. 1 (1): DMA channel is enabled

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